1. Field of the Invention
The present invention relates to a semiconductor memory device including a memory cell array that includes a plurality of memory cells in a row direction and a column direction, respectively, wherein each of the memory cells includes a variable resistive element storing information based upon an electric operating characteristic in which an electric resistance changes due to application of an electric stress.
2. Description of the Related Art
A non-volatile memory represented by a flash memory has widely been used for a computer, communication, measuring device, automatic control device, and device for daily use in a personal life, as a high-capacity and compact information recording medium. A demand for an inexpensive and high-capacity non-volatile memory has been extremely increased. The reason of this is as follows. Specifically, the non-volatile memory is electrically rewritable, and further, data is not erased even if a power supply is turned off. From this viewpoint, it can exhibit a function as a memory card or a cellular phone that is easy to carry, or a data storage or a program storage that stores data as an initialization upon starting a device in a non-volatile manner.
However, in the flash memory, it takes time to perform an erasing action of erasing data to a logical value “1”, compared to a programming action for programming a logical value “0”. Therefore, the flash memory cannot be operated with high speed. The erasing action is performed on a block basis in order to speed up the action. However, there arises a problem that writing by random access cannot be performed, since the erasing action is performed on a block basis.
In view of this, a novel non-volatile memory alternative to the flash memory has widely been studied in recent years. A resistance random access memory utilizing a phenomenon in which a resistance is changed through application of voltage to a metal oxide film is more advantageous than the flash memory in microfabrication limit. The resistance random access memory can also operate at low voltage, and can write data with high speed. Therefore, research and development have actively been made in recent years (e.g., see Japanese Unexamined Patent Publication No. 2002-537627, or Baek, I. G. et al, “Highly Scalable Non-volatile Resistive Memory using Simple Binary Oxide Driven by Asymmetric Unipolar Voltage Pulses”, IEDM 2004, pp. 587-590, 2004).
As for programming and erasing characteristics of the variable resistive element having the metal oxide film, an electric resistance of the element increases (high resistance state) or decreases (low resistance state) through application of a voltage pulse having a reverse polarity to the element, in a driving method called bipolar switching. Therefore, the variable resistive element is used as a memory by applying a logical value to the respective electric resistance states as data.
Since the programming and erasing actions can be performed at low voltage with high speed, the memory using the variable resistive element having the metal oxide can write an optional address with high speed. Therefore, the data, which has conventionally been developed and used on a DRAM, can be used on the non-volatile memory. Accordingly, a reduction in power consumption and improvement in usability of a mobile device can be expected.
On the other hand, there are problems to be solved, caused by the property unique to the resistance random access memory.
In order to use a semiconductor memory device as a memory, an action of reading the written data is essential. For example, in order to use, as information, the data on which one of a logical value “0” and a logical value “1” is written, one of the logical value “0” and the logical value “1” has to be correctly read at all times, except when the data is rewritten.
On the other hand, on a memory using a variable resistive element having a metal oxide, data is stored as a resistance state of the variable resistive element having two terminals. Therefore, the programming and erasing for changing the resistance state of the variable resistive element, and the reading of the resistance state must be controlled only by a magnitude of the voltage applied between the two terminals. It is desirable that there is a sufficient difference between the voltage for the programming and erasing actions and the voltage for the reading action in order to prevent erroneous writing of the data by the reading action.
As the microfabrication and integration of the element progress, the reduction in voltage and current used for the programming action and the erasing action is required. On the other hand, it is difficult to remarkably reduce the reading current in order to realize a high reading speed. Accordingly, it becomes difficult to generate a sufficient difference between the programming voltage and the erasing voltage, and the reading voltage.
The number of elements to be mounted is increased due to a high capacity of a memory, whereby a possibility of the erroneous writing of the data during the reading action increases.
When data is continuously read from a specific memory cell without being rewritten during the reading action, there may be a case in which a resistance value is changed gradually or at a certain timing, and erroneous data is outputted when a next reading action is performed, whereby erroneous information is outputted. This phenomenon is referred to as “reading disturb” below.
As a countermeasure for the erroneous writing, a method called ECC (Error Checking and Correcting) has widely been used for a flash memory or a storage disk for enhancing reliability during the reading action. In this method, an error data is detected, and the data from which an error is detected is inverted, corrected, and outputted.
However, when the erroneous writing is caused on the data during the reading action, a bit to which erroneous writing is made is accumulated and increased during the continuous reading action, even if only the output of the reading is corrected. Consequently, the number of bits to which an erroneous writing is made might exceed the limit that can be detected and corrected in the ECC.
Japanese Unexamined Patent Publication No. 2010-3348 proposes a method of correcting not only an output but also data of a memory cell, when a data error is detected, for example.
When the data written in the memory cell is rewritten and corrected every time an error is detected, this process greatly affects a data reading speed of a memory system and deteriorates the performance, in the case where the programming and erasing actions are slower than the reading action by many digits as in the flash memory.
Further, in order to correct the reading output, the read data only needs to be inverted. However, when the data in the memory cell is corrected, the writing action of the variable resistive element is necessary, and its process is complicated. Specifically, when the data written in the memory cell is to be corrected in the case where an error is detected, it is necessary to determine what the error data is. Supposing a memory cell to which a logical value “1” (e.g., corresponding to a high resistance state) and a logical value “0” (e.g., corresponding to a low resistance state) can be written, it is necessary to determine what the data error is. Specifically, it has to be determined whether the error is such that the data to which the logical value “1” is originally written is changed to the logical value “0”, or the error is such that the data to which the logical value “0” is originally written is changed to the logical value “1”. Thus, in order to correct the data, the time for determining which error is caused is required.
Further, the application condition of a voltage on a circuit greatly differ between the case where the logical value “1” is written over “0” and the case where the logical value “0” is written over “1”. Therefore, after the state is determined, more time is taken to set the voltage application state for a desired writing action to the memory cell that is a target of the writing action.
In the above description, the logical value “1” is set as the “high resistance state”, and the logical value “0” is set as the low resistance state. However, the same is applied in the case where the logical value “1” is set as the low resistance state, and the logical value “0” is set as the high resistance state.